Ultra-Dense CFET Tech Boosts Chip Performance with Low Power
Advancing Moore’s Law with Enhanced Chip Integration Density
Tags: National Yang Ming Chiao Tung University, Taiwan, Electronics & Robotics, Consumer Goods & Services
NYCU’s research team, led by Professor Po-Tsun Liu, developed ultra-high-density heterogeneous complementary field-effect transistor (CFET) technology aimed at advancing angstrom-scale integrated circuits. This breakthrough involves a three-dimensional stacking structure that increases the integration density of chips, surpassing Moore's Law. The technology, combining amorphous indium tungsten oxide and polycrystalline silicon transistors, enhances performance while reducing power consumption. Applications include artifical IoT, wearable electronics, and low-power intelligent networks. This advancement promises to drive future developments in semiconductor technology and green production chains.
IP Type or Form Factor: Design; Material; Platform
TRL: 4 - minimum viable product built in lab
Industry or Tech Area: Semiconductors; Wearables
